Technical
25 Apr 2020
So it’s been a busy (and rough) semester effectively rebuilding and teaching EECS 201 at the University of Michigan. Grades have finally been posted, so I decided to treat myself to some good ol’ systems programming before getting back into the research grind. What better way to unwind than hardcore assembly programming?
Technical > Tutorial
11 May 2019
This post is a copy from my old website and blog. It was originally authored on 2018 December 30. I have made some revisions since.
Icarus Verilog is a free Verilog simulator with some SystemVerilog support.
I personally enjoy using it because it’s really easy and quick to get it up and running.
Icarus Verilog compiles the Verilog source into a file that is executed by its simulator vvp.
GTKWave is a free waveform viewer, which is useful for debugging designs.
This tutorial is intended for people who already know about digital logic design and Verilog but aren’t familiar with Icarus or GTKWave. It’s not a deep dive into either, but will get you up and running designs. If you want to get further into it, I suggest looking at the manuals for the tools.
Random
02 May 2019
Last modified 07 May 2019
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Technical > Projects
06 Jul 2018
This post is a copy from my old website and blog. I have kept its original post date.
In wake of restricting the scope of the CPU to being what was wrapped by the bus in the previous post, I decided to look at the overall LC-3 system and how to implement it. I settled on having a memory controller and interrupt controller that existed outside of the CPU but still hooked up to the bus and had wires to communicated the control signals to make it compatible with the reference specification of control signals.
Technical > Projects
28 Jun 2018
This post is a copy from my old website and blog. I have kept its original post date.
In the last post, I looked at putting together some building blocks to use when I work on the actual LC-3 bits.
In this post I’ll discuss implementing the reference design found in Appendix C Figure C.8 of Introduction to Computing Systems 2nd Ed.
Technical > Projects
02 Jun 2018
This post is a copy from my old website and blog. I have kept its original post date.
Before I head off and implement the CPU itself, it’s important to realize that we’re going to need the other parts of the computer system, such as memory, registers and buses etc. In this post, I’ll be discussing the first few Verilog modules that I created in order to enable implementing the overall system. Since there is already a baseline microarchitecture done complete with control signals, I thought it’d be prudent to come up with modules that corresponded to the various structures present. However, I most likely will be implementing the CPU logic in behavioral Verilog.
Life > Work
30 May 2018
This post is a copy from my old website and blog. I have kept its original post date.
So today was my first day for my new internship at NVIDIA, this time for the Linux GPU driver team.
Life > Work
10 Apr 2018
This post is a copy from my old website and blog. I have kept its original post date.
It’s been about a month since my last post: there’s been a lot going on with school (and my “hibernation” during spring break).
So on March 15, 2018 I got an email from the University Recruiting team about how the hiring manager has started the offer process for me. Yay! I have a job this summer!
Life > School
10 Apr 2018
This post is a copy from my old website and blog. I have kept its original post date.
Around the time I posted Technical Interview with Nvidia, I had actually gone to a site visit for the CSE (Computer Science and Engineering) department at UMich, which I was invited to as an accepted Ph.D student.
Life > Work
09 Mar 2018
This post is a copy from my old website and blog. I have kept its original post date.
This happened about a month ago, two days after the Valentine’s day post. I didn’t really get a chance to make a post on reflect on it, but I’ve got some time now.
So a while back I made a post about how I had another interview with NVIDIA with the Director of Linux Software. Turns out it was a behavioral interview with the director acting as the hiring manager. He told me about the team and what products they were involved with (hint hint: it’s related to Linux). Anyway, it was pretty uneventful, and I soon scheduled my 2nd interview.
Technical > Projects
10 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
In the previous post I showed you a really basic, one-off read from memory. It’s alright for demonstartion purposes, but to make it actually useful we need to accomplish some goals:
Technical > Projects
10 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
So in the labs for the UT class EE 460N (Computer Architecture) we have to make a cycle-level, block-diagram accurate C implementation of Dr. Yale Patt’s LC-3b ISA as well as implement additional features such as interrupt processing and virtual memory.
What irked me was that we had to ustilize ANSI C in ONE. SINGLE. FILE. instead of using some HDL.
To rectify this, I’m going to do implementations of the original LC-3 ISA as specified by Patt’s Introduction to Computing Systems, 2nd Ed. in structural Verilog and see if I can get it all the way to be put onto an FPGA.
Follow the project’s code here.
Technical > Projects
05 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
This came as a surprise to me too. We learn early on in our operating systems course(s) that it’s the operating system’s job to protect the system’s resources from our grubby use-land paws and virtualize the memory space for userprocesses so we don’t compromise our computer.
Technical > Projects
04 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
So I’m currently taking EE 382N.4 Advanced Micro-Controller Systems at UT, taught by Dr. Mark McDermott. The class revolves around working wiht a ZedBoard, which has a Xilinx Zynq-7020 SoC combining two ARM Cortex-A9 cores with an FPGA, where we learn to write hardware accelerators and integrate them into a Linux system.
As part of this, we’ve been given the binary and source of a nifty set of programs that Dr. McDermott wrote that are able to print out (or put a value at) values from provided physical addresses. The kicker is that we’ll have to write a program that will write to the registers of a device on the FPGA that has to replicate the behavior of this set of programs.
I decided to write a library that abstracts this process and provides a clean interface to perform this in:
no need to directly muck about with mmap() and such, and have called it “libmem” in honor of
it using the /dev/mem device.
Life > Work
03 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
So a recruiter from NVIDIA got in touch with me and apparently, I’m going to have a phone screen with the Director of Linux Software for an internship position.
Needless to say, I am very excited. Time for me to cram Linux kernel knowledge!
Life > Work
02 Feb 2018
This post is a copy from my old website and blog. I have kept its original post date.
So in the summers of 2016 and 2017 I interned for NVIDIA’s Tegra Software, Camera teams, with the first stint in the Controls team and my second stint in the Performance team. I didn’t go for my return offer to the same team, instead opting to interview for a different team.